Abstract—Realization of all-digital baseband receiver processing for multi-Gigabit communication requires analog-to-digital converters (ADCs) of sufficient rate and output resolution. A promising architecture for this purpose is the time-interleaved ADC (TI-ADC), in which L “sub-ADCs ” are employed in parallel. However, the gain, timing and voltage-offset mismatches between the sub-ADCs, if left uncompensated, lead to error floors in receiver performance. A standard technique for gain and timing mismatch correction is to use L FIR filters, with tap lengths increasing with the mismatch levels. In this paper, we investigate the use of TI-ADCs in OFDM receivers, and provide a scalable technique for mismatch compensation whose complexity is ind...
Analog-to-digital-conversion enables utilization of digital signal processing (DSP) in many applicat...
This paper proposes a new iterative framework for the correction of frequency response mismatch in t...
The purpose of this thesis is to demonstrate the effects of mismatch errors that occur in time-inter...
For the extremely high sampling rate and high resolution required for multi-Gigabit orthogonal frequ...
The concept of a Time-Interleaved analog-to-digital converter (TI ADC) which comprises sub-ADCs (ch...
This paper presents a methodology to minimize mismatch errors in time-interleaved analog-to-digital ...
The time-interleaved architecture permits the implementation of high-frequency analog-to-digital con...
Time-interleaved analog-to-digital converters (TI-ADCs) are widely used for multi-Gigabit orthogonal...
Time interleaving is an effective method to achieve a high sampling rate by using a bank of low samp...
We present a novel method for the estimation and correction of mismatch errors in time-interleaved a...
High speed analog to digital converters (ADC) are required in high speed applications such as instru...
Time-interleaved analog-to-digital converters (TIADCs) are widely used for multi-Gigabit orthogonal ...
In this paper, we study a versatile iterative framework for the correction of frequency response mis...
Time interleaving can relax the speed-power trade-off of analog-to-digital converters but at the cos...
This paper presents an efficient procedure to numerically evaluate the exact bit error rate of a rec...
Analog-to-digital-conversion enables utilization of digital signal processing (DSP) in many applicat...
This paper proposes a new iterative framework for the correction of frequency response mismatch in t...
The purpose of this thesis is to demonstrate the effects of mismatch errors that occur in time-inter...
For the extremely high sampling rate and high resolution required for multi-Gigabit orthogonal frequ...
The concept of a Time-Interleaved analog-to-digital converter (TI ADC) which comprises sub-ADCs (ch...
This paper presents a methodology to minimize mismatch errors in time-interleaved analog-to-digital ...
The time-interleaved architecture permits the implementation of high-frequency analog-to-digital con...
Time-interleaved analog-to-digital converters (TI-ADCs) are widely used for multi-Gigabit orthogonal...
Time interleaving is an effective method to achieve a high sampling rate by using a bank of low samp...
We present a novel method for the estimation and correction of mismatch errors in time-interleaved a...
High speed analog to digital converters (ADC) are required in high speed applications such as instru...
Time-interleaved analog-to-digital converters (TIADCs) are widely used for multi-Gigabit orthogonal ...
In this paper, we study a versatile iterative framework for the correction of frequency response mis...
Time interleaving can relax the speed-power trade-off of analog-to-digital converters but at the cos...
This paper presents an efficient procedure to numerically evaluate the exact bit error rate of a rec...
Analog-to-digital-conversion enables utilization of digital signal processing (DSP) in many applicat...
This paper proposes a new iterative framework for the correction of frequency response mismatch in t...
The purpose of this thesis is to demonstrate the effects of mismatch errors that occur in time-inter...